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PRELIMINARY TECHNICAL DATA
EVAL-ADE7758EB
Voltage sense inputs (P7, P8 and P11)
The voltage inputs connections on the ADE7758 evaluation
board can be directly connected to the line voltage sources.
The line voltages are attenuated using a simple resistor
divider network before it is presented to the ADE7758. The
attenuation network on the voltage channels is designed such
that the corner frequency (3dB frequency) of the network
matches that of the RC (anti-aliasing) filters on the current
channels inputs. This is important, because if they do not
match there will be large errors at low power factors.
The Serial interface along with the digital parameters of the
ADE7758 enable a fully software calibration procedure. In
this case, the voltage attenuation networks are made up of
R48, R49 and R47 for Phase A, R45, R46 and R44 for Phase
B and R41, R42 and R43 for Phase C. Figure 3 shows a
typical connection for the line voltage when using fixed
resistors.
P8 2
JP28
JP27
R40
1k ?
JP32
C1
TP13
ADE7758
VN
33nF
P7 1
JP38
100 - 250 V rms
JP25
R48 R49
499k ? 499k ?
Attenuation
Network
C4
33nF R47
1k ?
JP49
TP17
VAP
200 - 300 mV
rms
Figure 3 — Phase A Voltage Channel attenuation network
using Fixed resistors
The attenuation networks can be easily modified by the user
to accommodate any input signal level. However the value of
R43, R44 and R47 (1k ? ) should not be altered as the phase
response of Voltage channels should match that of the current
channels.
The maximum signal level permissible at VAP, VBP and
VCP is 0.5V peak for the ADE7758. Although the ADE7758
analog inputs can withstand ±6V without risk of permanent
damage, the signal range should not exceed ±0.5V with
respect to AGND for the ADE7758 for specified operation.
Note that the analog input VN is connected to AGND via the
anti-alias filter R40/C1 using JP28. Jumper JP27 should be
left open.
REV. PrB 08/03
–3–
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